Unless I'm misunderstanding, a full framebuffer would be ~2.5MiB each with 8bpp, which is definitely "fast external SRAM" territory if that's the goal. Or am I not parsing correctly?
If we're talking exposing the address space as ordinary mapped memory, that seems quite doable. TBH I hadn't even internalized how restrictive that external mapping is on the original vera design, wow. Yeah if targeting ECP5, burning 24+8 bits on a direct memory map is a no-brainer.
Dave Anderson
npub1mt…xwant
2024-08-13 19:12:50 UTC
in reply to nevent1q…4n6f
Author Public Key
npub1mtg38agwglttl7melxnfqphlm95uymnrdedw62h9j7cyquynza0szxwantSeen on
wss://relay.momostr.pinkPublished at
2024-08-13 19:12:50 UTCEvent JSON
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