Dave Anderson on Nostr: Tricky part with the palette ram in particular is it's completely timing constrained ...

Tricky part with the palette ram in particular is it's completely timing constrained in my design sketch: if I hand it an address, I _need_ the RGB data to be ready on the next cycle, because it's all being pushed synchronously as each pixel's being output. The other main vram access goes through arbiters and can accept a cycle or two of delay if there's contention... But not the palette ram, at least in my current sketch. But possibly I can adjust where it sits to make that work.