{"type":"rich","version":"1.0","title":"semisol wrote","author_name":"semisol (npub122…cgrkj)","author_url":"https://yabu.me/npub12262qa4uhw7u8gdwlgmntqtv7aye8vdcmvszkqwgs0zchel6mz7s6cgrkj","provider_name":"njump","provider_url":"https://yabu.me","html":"Anyway, having a huge pipeline is only going to annihilate your Fmax. Instead have a “programmable ALU” with 128/256 bit path, RAM to store registers and operation microcode in ROM-ish blocks\n\nIt’ll still be faster than CPU, this is how most hardware accelerators for ECDSA work"}
